Simple Machine Basics

The Simple Machine (SM) has only 15 instructions and uses a wordsize that is 16 bits. All operations, both instructions and data, are performed on 16 bit quantities, and the only data type it can operate on is signed short integer. Thus, its memory can be thought of (and simulated as) an array of 16-bit integers, containing both instructions (interpreted as unsigned) and data (interpreted as signed).

The instruction format is very simple:

where

• The four-bit opcode field has room to encode 2^4 or 16 different opcodes. Opcodes 0x0 - 0xe (decimal 0-14) are currently defined. The are detailed in the SimpleMachine document
  
• Bits 10 and 11 are unused bits in the instruction word.
  
• The address field, if used, contains a 10-bit constant that may be interpreted as
• a 10-bit address (unsigned, of course) OR
• a 10-bit unsigned integer
  

Since it is an accumulator-based machine, the register(s) associated with the instruction are implicit in the instruction.

Simple Machine Registers

The Simple Machine registers are also detailed in the SimpleMachine document, but, as a brief review

• the user-accessible registers are the accumulator (accum), the address register (areg) and the counter (ctr).
  
• memory-interface registers are the memory address register (mar) and memory buffer register (mbr)
• registers for handling the instruction cycle are the program counter (pc) and instruction register(ir)

Simple Machine Programs

The machine starts with an initial pc of 0. Thus instructions must be placed before data in the memory array.

Simple Machine operations are simulated by the Simple Machine simulator, sim. sim simulates the Simple machine by simulating its RTL (see below).

There is no assembler. SM instructions must be encoded in hexadecimal. For the programmer's convenience, the textual representation of hexadecimal may be used. sim will convert this to the corresponding binary and store it in the memory array before simulation begins. In the textual representation, each line is an instruction. A # on the line at any point indicates the rest of the line is a comment. If the entire line is a comment, it must begin with a #. As we know, hexadecimal numbers must start with 0x.

Example:

The simplest correct Simple Machine program is

0x0  # The end of the world!

A single instruction is executed. Its opcode is 0 (HALT). The machine halts.

RTL (or RTN)

Register transfer language (or notation) is used to describe the movement between, and operations on, registers and memory due to an instruction's execution. The RTL we use for the SM is simple, and is derived loosely from the diagram of the SM that shows its connected registers and how data may move. An added restriction is that each SM instruction is limited to two data transfers - one fetch operation to retrieve the next instruction, and one data memory cycle during the instruction execution phase.

As an illustration of RTL we will write the RTL for the entire simulation of a single instruction at address 0x3. The encoded instruction is 0x900a. When we begin the instruction cycle, here are the values for the registers and the first 11 words of the memory array. (I have capitalized the register names in the RTL to make them stand out. I have also annotated the RTL with C++-style comments)

PC: 0x3   ACCUM: 0x26  CTR: 0

MEMORY[] = { 0xb030,0x200a,0xb026,0x900a,0x2009,0x0,0x0,0x0,0x0,0x0,0x30 }

• Fetch cycle
• MAR <- PC       // set the next memory address to that in the PC
  
• PC <- PC+1      // increment the PC
  
• get()           // perform the memory cycle, placing mem[MAR] into MBR
  
• IR <- MBR       // transfer the instruction to the IR
  
• Execution cycle   // based on IR(15:12), which is 0x9 (SUB)
  
• MAR <- 0    // zero out the MAR before we transfer the address from the instruction
  
• MAR(9:0) <- IR(9:0)  // transfer the address in the SUB instruction to the MAR
  
• get()
  
• ACCUM <- MBR - ACCUM // subtract the accumulator from the memory value
  

At the end of this sequence the ACCUM has the value 0xA.

Note that we have zeroed out the MAR before copying the address from the instruction to it. This is because all registers are 16-bits and we must ensure that the upper bits in the MAR are zero. (You might assume that the upper bits are always zero, since the memory space is only 1024 words, and a longer address would reference illegal memory, but this is a bit questionable.)

Can you finish the execution of the entire SM program that is in the memory array and determine what the resulting memory array looks like? (Hint: there is only one more instruction to execute, so there is only one change possible to the memory array.)

You should read the handout SimpleMachine and review the diagram of the SM  before you continue to the next section.